Heterogeneous Memory for Efficient High-Performance Computing
Demystifying and Exploiting Disaggregated and Unified Memories
Time: Wed 2026-06-03 10.00
Location: D2, Lindstedtsvägen 5, Stockholm
Video link: https://kth-se.zoom.us/j/63629383835?pwd=Sv3nijYp91NaaBxSrGkafZtSzPcV8W.1
Language: English
Subject area: Computer Science
Doctoral student: Jacob Wahlgren , Beräkningsvetenskap och beräkningsteknik
Opponent: Doctor Antonio Peña, Barcelona Supercomputing Center, Barcelona, Spain
Supervisor: Associate Professor Ivy Bo Peng, Beräkningsvetenskap och beräkningsteknik; Professor Stefano Markidis, Beräkningsvetenskap och beräkningsteknik
QC 20260505
Abstract
High-performance computing (HPC) systems face architectural challenges impacting their efficiency, including the memory wall, resource under-utilization, and increasing heterogeneity. This compilation thesis explores the potential of emerging heterogeneous memory designs such as disaggregated memory (DM) and unified physical memory (UPM) in addressing these issues. DM addresses capacity and resource utilization challenges by enabling dynamic provisioning within a cluster based on demand, instead of traditional static provisioning. We presented the first empirical analysis of DM in HPC using the recent Compute Express Link (CXL) and studied the interference issue in shared memory pools. We also explored the prospects for user-space RDMA-based DM and avenues for acceleration using Smart Network Interface Cards (SmartNICs). UPM addresses data transfer, capacity, and productivity challenges by physically unifying the memory of CPUs and GPUs in heterogeneous systems. We provided the first in-depth characterization of the memory architecture of the recent AMD MI300A APU, the first UPM architecture for HPC. We also showed how UPM impacts GPU programming models and can enable both higher performance and productivity for HPC applications.