Scalable Fabrication of Micro-Supercapacitors via Direct Patterning
From Material Design towards On-Chip Integration
Time: Wed 2025-10-29 10.00
Location: F3, Lindstedtvägen 26
Language: English
Subject area: Electrical Engineering
Doctoral student: Shiqian Chen , Elektronik och inbyggda system
Opponent: Professor Per Lundgren, Chalmers University of Technology, Göteborg, Sweden
Supervisor: Associate professor Jiantong Li, Elektronik och inbyggda system; Professor Frank Niklaus, Mikro- och nanosystemteknik; Professor Per-Erik Hellström, Elektronik och inbyggda system; Professor Matti Mäntysalo, Faculty of Information Technology and Communication Sciences, Tampere University, Tampere, Finland
QC 20251006
Abstract
The rapid advancement of miniaturized electronics demands compact, high-performance on-chip energy storage with seamless integration. Printed micro-supercapacitors (MSCs) are promising candidates, offering high power density, long cycle life, and inherent compatibility with planar integration. Direct printing techniques like direct ink writing (DIW) and direct laser patterning (DLP) enable flexible design, material versatility, scalability, and high precision on-chip integration. However, realizing miniaturized MSCs that combine high electrochemical performance, scalability, environmental versatility and seamless on-chip fabrication remains challenging. Key obstacles include developments of high-performance material design and well-defined patterning strategies.
Part I of this thesis enhances MSC performance and printing scalability using DIW. The first work developed a doped PEDOT:PSS electrode ink with optimized rheology and electrochemical properties, enabling fully printed compact 100-cells MSC arrays on paper substrate with high capacitance, ultrahigh-rate capability, and an extended operating voltage window (up to 160 V) for efficient instantaneous electricity storage. The second work significantly improves thermal stability through a DIW-printable bassanite framework combined with ionic liquid electrolytes, enabling the MSC array a long-term cycling at a record temperature of 300 °C. These advances demonstrate ink formulation designs for DIW enabled scalable fabrication of high-rate, robust MSC array capable of operating across diverse application environments.
Part II of this thesis improves on-chip MSC performance and integration based on DLP approach. The third work utilized DLP in hydrogen silsesquioxane (HSQ) to directly fabricate 3D hierarchical inorganic electrodes with self-formed nanogratings. Based on this structure, a compact on-chip MSCs with exceptional rate performance was fabricated with high-rate performance of 1 mF cm-2 at 50 V s-1 and high temperature stability up to 200 °C. The fourth work further using the 3D nanograting printing approach tailored on-chip MSC electrode microstructures to achieve high-frequency line-filtering up to 10 kHz. The precise fabrication of 3D standing nanograting structure provides large open surface area, facilitating fast ion transport, resulting in highly compact on-chip MSC with the highest reported areal capacitance of 0.32 mF cm-2 at 10 kHz, thereby enabling effective filtering applications and further advancing the miniaturization of capacitors in microelectronic systems. These results establish DLP as a powerful approach for the high-precision construction of on-chip 3D structures and pave the way for integration of ultra-compact MSCs into miniaturized electronic systems for high-frequency applications.